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d a t a sh eet product speci?cation file under integrated circuits, ic02 2000 dec 11 integrated circuits TDA9853h i 2 c-bus controlled economic btsc stereo decoder and audio processor
2000 dec 11 2 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h features voltage controlled amplifier (vca) noise reduction circuit stereo or mono selectable at the af outputs stereo pilot pll circuit with ceramic resonator automatic pilot cancellation i 2 c-bus transceiver. audio processor selector for internal and external signals (line in) automatic volume level (avl) control (control range +6 to - 15 db) volume control (control range +12 to - 63 db) mute control via i 2 c-bus 4 fixed tone settings. general description the TDA9853h is a bipolar-integrated btsc stereo decoder and audio processor for application in tv sets, vcrs and multimedia pcs. ordering information type number package name description version TDA9853h qfp44 plastic quad ?at package; 44 leads (lead length 2.35 mm); body 14 14 2.2 mm sot205-1
2000 dec 11 3 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h quick reference data symbol parameter conditions min. typ. max. unit v cc supply voltage 7.8 8 9 v i cc supply current 25 33 45 ma v o(rms) output voltage (rms value) composite input voltage 250 mv (rms) for 100% modulation l + r (25 khz deviation); f mod = 300 hz - 500 - mv a csl,r stereo channel separation l and r 14% modulation; f l = 300 hz; f r = 3 khz 15 20 - db thd l,r total harmonic distortion l and r 100% modulation l or r; f mod = 1 khz - 0.2 1 % s/n signal-to-noise ratio at line out and at af output mono via i 2 c-bus; referenced to 500 mv output signal; volume 0 db ccir 468-2 weighted; quasi peak 50 60 - db din noise weighting filter (rms value) - 73 - dba v i, o(rms) signal handling (rms value) thd < 0.5% 2 -- v avl avl control range - 15 - +6 db g c volume control range - 63 - +12 db l linear linear tone control - 0 - db l bass(max) tone control with maximum bass referenced to linear position; f mod =20hz 10 12 - db l bass(min) tone control with minimum bass referenced to linear position; f mod =20hz 3.5 5 - db l treble(max) tone control with maximum treble referenced to linear position; f mod =20khz 68 - db l treble(min) tone control with minimum treble referenced to linear position; f mod =20khz -- 1.5 - db
2000 dec 11 4 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... block diagram handbook, full pagewidth mhb789 c22 c23 bpu 32 c21 c w 31 c20 tw 30 v cc 41 c19 v cap 28 agnd 36 v ref 27 lol 9 c17 c18 r3 r2 r1 c3 c4 q1 lil 8 external input left (eil) r fr 7 37 38 39 40 val vil 10 16 11 TDA9853h detector and voltage controlled amplifier volume left control c15 c16 c14 tc1l 13 tc2l 14 c13 bcl outl 15 tone left control i 2 c-bus transceiver scl sda dgnd mad filter and reference automatic volume and level control input select supply stereo decoder composite baseband input dematrix and mode select l + r l - r var vir 24 23 volume right control c10 c9 c p2 c p1 c ph 342 cer 43 2 4 c2 c11 tc1r 21 tc2r 20 c12 bcr 19 tone right control c6 c5 c mo 5 c ss 6 c7 lir 26 lor 25 external input right (eir) c8 c av 29 18 outr c1 comp 35 fdi 33 fdo r4 fig.1 block diagram.
2000 dec 11 5 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h component list electrolytic capacitors 20%; foil capacitors 10%; resistors 5%; unless otherwise speci?ed; see fig.1. component value type remark c1 2.2 m f electrolytic 63 v c2 220 nf foil c3 2.2 m f electrolytic 63 v c4 220 nf foil c5 2.2 m f electrolytic 63 v c6 2.2 m f electrolytic 63 v c7 2.2 m f electrolytic 63 v c8 4.7 m f electrolytic 63 v 10% c9 2.2 m f electrolytic 63 v c10 3.3 nf foil c11 150 pf foil c12 56 nf foil c13 56 nf foil c14 150 pf foil c15 3.3 nf foil c16 2.2 m f electrolytic 63 v c17 2.2 m f electrolytic 63 v c18 100 m f electrolytic 16 v c19 100 m f electrolytic 16 v c20 10 m f electrolytic 63 v c21 1 m f electrolytic 63 v c22 4.7 nf foil c23 22 nf foil r1 3.3 k w r2 15 k w r3 1.3 k w r4 100 k w q1 csb503f58 radial leads csb503jf958 alternative as smd
2000 dec 11 6 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h pinning symbol pin description n.c. 1 not connected c p2 2 connector 2 for pilot detector capacitor c p1 3 connector 1 for pilot detector capacitor comp 4 composite input signal c mo 5 capacitor for dc-decoupling mono c ss 6 capacitor for dc-decoupling stereo r fr 7 resistor for ?lter reference lil 8 line input; left channel lol 9 line output; left channel vil 10 volume control input; left channel val 11 avl output; left channel n.c. 12 not connected tc1l 13 treble capacitor 1; left channel tc2l 14 treble capacitor 2; left channel bcl 15 bass capacitor; left channel outl 16 left channel output n.c. 17 not connected outr 18 right channel output bcr 19 bass capacitor; right channel tc2r 20 treble capacitor 2; right channel tc1r 21 treble capacitor 1; right channel n.c. 22 not connected var 23 avl output; right channel vir 24 volume control input; right channel lor 25 line output; right channel lir 26 line input; right channel v ref 27 reference voltage (0.5v cc ) v cap 28 capacitor for electronic ?ltering of supply c av 29 capacitor for avl tw 30 capacitor timing c w 31 capacitor for vca and band-pass ?lter lower corner frequency bpu 32 band-pass ?lter upper corner frequency fdo 33 ?xed de-emphasis output n.c. 34 not connected fdi 35 ?xed de-emphasis input agnd 36 analog ground dgnd 37 digital ground sda 38 serial data input/output mad 39 programmable address bit (module address) scl 40 serial clock input v cc 41 supply voltage c ph 42 capacitor for phase detector cer 43 ceramic resonator n.c. 44 not connected symbol pin description
2000 dec 11 7 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h handbook, full pagewidth TDA9853h mhb790 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 n.c. cer c ph v cc scl mad sda dgnd agnd fdi n.c. n.c. tc1l tc2l bcl outl n.c. outr bcr tc2r tc1r n.c. n.c. c p2 c p1 comp c mo c ss r fr lil lol vil val fdo bpu c w tw c av v cap v ref lir lor vir var fig.2 pin configuration. functional description stereo decoder the composite signal is fed into a pilot detector/pilot cancellation circuit and into the mpx demodulator. the main l + r signal passes a 75 m s fixed de-emphasis filter and is fed into the dematrix circuit. the decoded sub-signal l - r is applied to the volume controlled amplifier (vca) circuit. to generate the pilot signal the stereo demodulator uses a pll circuit including a ceramic resonator. mode selection the l - r signal is fed via the internal vca circuit to the dematrix/switching circuit. mode selection is achieved via the i 2 c-bus (see table 9). the dematrix outputs can be muted via the i 2 c-bus (see table 14). automatic volume level control the automatic volume level stage controls its output voltage to a constant level of typically 200 mv (rms) from an input voltage range between 0.1 to 1.1 v (rms). the circuit adjusts variations in modulation during broadcasting and because of changes in the programme material; this function can be switched off. to avoid audible plops during the permanent operation of the avl circuit a soft blending scheme has been applied between the different gain stages. a capacitor (4.7 m f) at pin c av determines the attack and decay time constants. in addition the ratio of attack and decay times can be changed via the i 2 c-bus. integrated ?lters the filter functions necessary for stereo demodulation are provided on-chip using transconductor circuits. the filter frequencies are controlled by the filter reference circuit via the external resistor r4.
2000 dec 11 8 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h audio processor s elector the selector enables the selection of either the internal line output signals lor and lol (dematrix output) or the external line input signals lir and lil (see table 16). the input signal capability of the line inputs (lir/lil) is 2 v (rms). the output of the selector is dc-coupled to the automatic volume level control circuit. v olume the volume control range is from +12 db to - 63 db in steps of 1 db and ends with a mute step (see table 8). balance control is achieved by the independent volume control of each channel. b ass function a single external 56 nf capacitor for each channel in combination with a linear operational amplifier and internal resistors provides a bass range of +12 db for high bass and +5 db for low bass. t reble function two external capacitors c15 = 3.3 nf and c14 = 150 pf for each channel in combination with a linear operational amplifier and internal resistors provide a treble range of +8 db for high treble and - 1.5 db for low treble. m ute the mute function can be activated independently with the last step of volume control at the left or right output. by setting the general mute bit gmu the audio outputs outl and outr are muted. limiting values in accordance with the absolute maximum rating system (iec 60134). notes 1. machine model class b, equivalent to discharging a 200 pf capacitor through a 0 w series resistor (0 w is actually 0.75 m h+10 w ). 2. human body model class b, equivalent to discharging a 100 pf capacitor through a 1500 w series resistor. thermal characteristics symbol parameter conditions min. max. unit v cc supply voltage - 9.5 v v sda, v scl voltage at pins sda and scl referenced to gnd v cc 9v - 0.3 +v cc v v cc >9v - 0.3 +9 v v n voltage of all other pins to gnd 0 v cc v t amb ambient temperature - 20 +70 c t stg storage temperature - 65 +150 c v es electrostatic handling voltage note 1 - 200 +200 v note 2 - 2000 + 2000 v symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air 70 k/w
2000 dec 11 9 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h characteristics all voltages are measured relative to gnd; v cc =8v; r s = 600 w ; ac-coupled; r l =10k w ; c l = 2.5 nf; f mod = 1 khz mono signal; composite input voltage 250 mv (rms) for 100% modulation l + r (25 khz deviation); pilot 50 mv (rms); g v = 0 db; linear tone control; avl off; t amb =25 c; see fig.1; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit supplies v cc supply voltage 7.8 8 9 v i cc supply current 25 33 45 ma v ref internal reference voltage at pin v ref 0.45v cc 0.5v cc 0.55v cc v input stage v i(max)(rms) maximum input voltage (rms value) 2 -- v z i input impedance 20 25 32 k w stereo decoder hr headroom for l + r, l and r f mod = 300 hz; thd < 15% 9 -- db v pil(rms) nominal stereo pilot voltage (rms value) - 50 - mv v th(on)(rms) pilot threshold voltage, stereo on (rms value) -- 35 mv v th(off)(rms) pilot threshold voltage, stereo off (rms value) 15 -- mv hys hysteresis - 2.5 - db v o(rms) output voltage (rms value) 100% modulation l + r; f mod = 300 hz - 500 - mv a cs(l,r) stereo channel separation l and r 14% modulation; f l = 300 hz; f r = 3 khz 15 20 - db thd l,r total harmonic distortion l and r 100% modulation l or r; f mod = 1 khz - 0.2 1 % s/n signal-to-noise ratio at line output and af output mono via i 2 c-bus; referenced to 500 mv output signal ccir 468-2 weighted; quasi peak 50 60 - db din noise weighting filter (rms value) - 73 - dba a mute mute attenuation at lol, lor, val and var 100% modulation l + r; f mod = 300 hz; mute via bit e6 63 -- db stereo decoder, oscillator (vcxo); note 1 f o nominal vcxo output frequency (32f h ) with nominal ceramic resonator - 503.5 - khz d f fr spread of free-running frequency with nominal ceramic resonator 500 - 507 khz d f cr capture range frequency nominal pilot 190 265 - hz
2000 dec 11 10 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h audio control part; input pins vil and vir to pins outl and outr v o dc output voltage 0.45v cc 0.5v cc 0.55v cc v z i volume input impedance 25 30 38 k w z o output impedance - 80 120 w r l output load resistance 5 -- k w c l output load capacitance 0 - 2.5 nf v i(max)(rms) maximum input voltage (rms value) thd < 0.5% tbf 2 - v thd total harmonic distortion 1 v (rms) input voltage - 0.05 - % v no noise output voltage ccir 468-2 weighted; quasi peak g v =10db - 110 220 m v g v =0db - 33 50 m v mute position - 10 -m v g c volume control range maximum boost - 12 - db maximum attenuation - 63 - db g step step resolution - 1 - db step error between adjoining step g v = +12 to - 15 db and g v = - 16 to - 63 db; note 2 -- 0.5 db d g a attenuator set error g v = +12 to - 50 db -- 2db g v = - 51 to - 63 db -- 3db d g l gain tracking error g v = +12 to - 50 db -- 2db a m mute attenuation 80 -- db v dc(os) dc step offset between any adjacent step g v = +12 to 0 db - 0.2 10 mv g v =0to - 63 db -- 5mv dc step offset between any step to mute g v = +12 to 0 db - 215mv g v = - 1to - 63 db - 110mv tone control part l linear linear tone control - 0 - db l bass(max) tone control with maximum bass referenced to linear position; f mod =20hz 10 12 - db l bass(min) tone control with minimum bass referenced to linear position; f mod =20hz 3.5 5 - db l treble(max) tone control with maximum treble referenced to linear position; f mod = 20 khz 68 - db l treble(min) tone control with minimum treble referenced to linear position; f mod = 20 khz -- 1.5 - db symbol parameter conditions min. typ. max. unit
2000 dec 11 11 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h vca i s nominal timing current for nominal release rate of vca detector i s can be measured at pin tw via current meter connected to 0.5v cc +1v 6.5 8 9.5 m a rel rate nominal detector release rate nominal timing current and external capacitor values - 125 - db/s automatic volume level control g v voltage gain maximum boost; note 3 5 6 7 db maximum attenuation; note 3 14 15 16 db g step equivalent step width between the input stages (soft switching system) - 1.5 - db v i(rms) input voltage (rms value) maximum boost; note 3 - 0.1 - v maximum attenuation; note 3 - 1.125 - v v o(avl)(rms) output voltage in avl operation (rms value) 160 200 250 mv v offset(dc) dc offset voltage between different gain steps voltage at pin c av 6 to 5.83 v or 5.83 to 5.61 v or 5.61 to 4.83 v or 4.83 to 2.1 v; note 4 -- 20 mv r att discharge resistors for attack time constant at1 = 0; at2 = 0; note 5 340 420 520 w at1 = 1; at2 = 0; note 5 590 730 910 w at1 = 0; at2 = 1; note 5 0.96 1.2 1.5 k w at1 = 1; at2 = 1; note 5 1.7 2.1 2.6 k w i dec charge current for decay time normal mode; ccd = 0; note 6 1.6 2 2.4 m a power-on speed-up; ccd = 1; note 6 - 30 -m a selector internal and external z i input impedance 16 20 25 k w a s input isolation of one selected source to the other input v i =1v; f i = 1 khz 70 76 - db v i =1v; f i = 12.5 khz 70 76 - db v i(max)(rms) maximum input voltage (rms value) thd < 0.5% - 2 - v g v voltage gain, selector - 0 - db line output; pins lol and lor v o(rms) nominal output voltage (rms value) 100% modulation - 500 - mv hr o output headroom 9 -- db z o output impedance - 80 120 w v o dc output voltage 0.45v cc 0.5v cc 0.55v cc v r l output load resistance 5 -- k w c l output load capacitance -- 2.5 nf symbol parameter conditions min. typ. max. unit
2000 dec 11 12 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h notes 1. the oscillator is designed to operate together with murata resonator csb503f58 or csb503jf958 as smd. change of the resonator supplier is possible, but the resonator speci?cation must be close to the speci?ed ones. 2. 1.5 db step error between - 15 and - 16 db. 3. the avl input voltage is internal. it corresponds to the output voltage outl and outr at avl off. 4. the listed pin voltage corresponds with typical gain steps of +6 db, +3 db, 0 db, - 6 db and - 15 db. 5. attack time constant = c cav r att with c cav = c8 (see fig.1). 6. a) example: c cav = 4.7 m f; i dec =2 m a; g 1 = - 9 db; g 2 =+6db ? decay time results in 4.14 s. 7. when reset is active the gmu bit (mute) is set and the i 2 c-bus receiver is in the reset position. 8. the ac characteristics are in accordance with the i 2 c-bus specification for standard mode (clock frequency maximum 100 khz). a higher frequency, up to 280 khz, can be used if all clock and data times are interpolated between standard mode (100 khz) and fast mode (400 khz) in accordance with the i 2 c-bus specification. information about the i 2 c-bus can be found in brochure i 2 c-bus and how to use it (order number 9398 393 40011). 9. maximum 9 v if v cc >9v. monitor output; pins val and var v o dc output voltage - 0.5v cc - v r l output load resistance 5 -- k w c l output load capacitance with 100 w in series -- 2.5 nf muting at power supply voltage drop for outr and outl d v cc supply voltage drop for mute active - v cap - 0.7 - v power-on reset; note 7 v por(start) start of reset voltage increasing supply voltage -- 2.5 v decreasing supply voltage - tbf - v v por(end) end of reset voltage increasing supply voltage - tbf - v digital part (i 2 c-bus pins); note 8 v ih high-level input voltage 3 - v cc (9) v v il low-level input voltage - 0.3 - +1.5 v i ih high-level input current - 10 - +10 m a i il low-level input current - 10 - +10 m a v ol low-level output voltage i il =3ma -- 0.4 v symbol parameter conditions min. typ. max. unit decay time c cav 0.76 v 10 g 1 C 20 ---------- 10 g 2 C 20 ---------- C ? ? ?? i dec -------------------------------------------------------------------------------- - =
2000 dec 11 13 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h handbook, full pagewidth - 4 8 12 0 4 mhb791 10 2 10 3 10 4 10 5 10 (1) (3) (2) (4) f (hz) gain (db) fig.3 tone control. (1) maximum bass. (2) maximum treble. (3) minimum bass. (4) minimum treble.
2000 dec 11 14 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h i 2 c-bus protocol i 2 c-bus format to read (slave transmits data) table 1 explanation of i 2 c-bus format to read (slave transmits data) table 2 de?nition of the transmitted bytes after read condition table 3 bit functions of table 2 i 2 c-bus format to write (slave receives data) table 4 explanation of i 2 c-bus format to write (slave receives data) s slave address r/ w a data an p name description s start condition; generated by the master standard slave address (mad) 1011011; pin mad not connected pin programmable slave address 1011010; pin mad connected to ground r/ w logic 1 (read); generated by the master a acknowledge; generated by the slave data slave transmits an 8-bit data word an acknowledge not; generated by the master p stop condition; generated by the master msb lsb d7 d6 d5 d4 d3 d2 d1 d0 yyyyyy ponr stp bit function stp stereo pilot identi?cation (stereo received = 1) ponr power-on reset; if ponr = 1, then power-on reset is detected y inde?nite s slave address r/ w a subaddress a data a p name description s start condition standard slave address 101 101 1; pin mad not connected pin programmable slave address 101 101 0; pin mad connected to ground r/ w logic 0 (write) a acknowledge; generated by the slave subaddress (sad) see table 5 data see table 6 p stop condition
2000 dec 11 15 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h if more than 1 byte of data is transmitted, then auto-increment is performed, starting from the transmitted subaddress and auto-increment of subaddress in accordance with the order of table 5 is performed. table 5 subaddress de?nition (second byte after slave address) note 1. significant subaddress bits. table 6 data de?nition (third byte after slave address) table 7 bit functions of table 6 function msb lsb d7 d6 d5 d4 d3 d2 d1 (1) d0 (1) volume right 00000000 volume left 00000001 control 1 00000010 control 2 00000011 function msb lsb d7 d6 d5 d4 d3 d2 d1 d0 volume right 0 b6 b5 b4 b3 b2 b1 b0 volume left 0 c6 c5 c4 c3 c2 c1 c0 control 1 0 e6 e5 e4 e3 e2 e1 e0 control 2 0 0 0 f4 f3 f2 f1 f0 bits symbol function b0 to b6 vr0 to vr6 volume control right c0 to c6 vl0 to vl6 volume control left e0 stereo mode selection for line out e1 gmu mute control for outl and outr e2 avlon avl on / off e3 ccd increased avl decay current on / off e4 and e5 at1 and at2 attack time at avl e6 lmu line out mute on / off f0 and f1 tone selection between four ?xed tone controls f2 mode selection between intern and extern f3 mono forced mono on / off at outl and outr f4 lito linear tone control on / off
2000 dec 11 16 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h table 8 volume setting function g v (db) data v6 v5 v4 v3 v2 v1 v0 121111011 111111010 101111001 91111000 81110111 71110110 61110101 51110100 41110011 31110010 21110001 11110000 01101111 - 11101110 - 21101101 - 31101100 - 41101011 - 51101010 - 61101001 - 71101000 - 81100111 - 91100110 - 101100101 - 111100100 - 121100011 - 131100010 - 141100001 - 151100000 - 161011111 - 171011110 - 181011101 - 191011100 - 201011011 - 211011010 - 221011001 - 231011000 - 241010111 - 251010110
2000 dec 11 17 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h - 261010101 - 271010100 - 281010011 - 291010010 - 301010001 - 311010000 - 321001111 - 331001110 - 341001101 - 351001100 - 361001011 - 371001010 - 381001001 - 391001000 - 401000111 - 411000110 - 421000101 - 431000100 - 441000011 - 451000010 - 461000001 - 471000000 - 480111111 - 490111110 - 500111101 - 510111100 - 520111011 - 530111010 - 540111001 - 550111000 - 560110111 - 570110110 - 580110101 - 590110100 - 600110011 - 610110010 - 620110001 - 630110000 mute 0 101111 function g v (db) data v6 v5 v4 v3 v2 v1 v0
2000 dec 11 18 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h table 9 mode setting table 10 mute setting table 11 avlon bit setting table 12 ccd bit setting table 13 avl attack time; see chapter characteristics note 5 table 14 line out mute setting table 15 tone setting table 16 selector setting table 17 mono setting table 18 linear setting function mode readable bit d0/stp setting bit e0/stereo lol lor left right logic 1 (stereo received) 1 mono mono logic 1 (stereo received) 0 mono mono logic 0 (no stereo received) 1 mono mono logic 0 (no stereo received) 0 function data mute control for outr and outl e1 forced mute at outr and outl 1 no forced mute at outr and outl 0 function data avl e2 automatic volume control on 1 automatic volume control off 0 function data avl current e3 increased load current 1 load current for normal avl decay time 0 function data r att ( w )e5e4 420 0 0 730 0 1 1200 1 0 2100 1 1 function data mute line output e6 line output mute 1 line output active 0 function data tone f1 f0 maximum bass and maximum treble 11 maximum bass and minimum treble 10 minimum bass and maximum treble 01 minimum bass and minimum treble 00 function data mode internal/external f2 external left and right 1 internal left and right 0 function data mono at outl and outr f3 forced mono 1 no forced mono 0 function data mode tone f4 linear 1 tone 0
2000 dec 11 19 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h internal pin configurations 2 + 8.5 k w 12 k w mhb792 fig.4 pin 2: c p2 . 3 3.5 k w + mhb793 fig.5 pin 3: c p1 . 4 + 25 k w 25 k w 25 k w 50 pf 100 pf mhb794 fig.6 pin 4: comp. 5, 6 10 k w 10 k w + mhb795 fig.7 pin 5: c mo ; pin 6: c ss . 7 1 k w + mhb796 fig.8 pin 7: r fr . 4 v 20 k w + 8, 26 mhb797 fig.9 pin 8: lil; pin 26: lir.
2000 dec 11 20 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h 4 v + 9, 25 mhb798 fig.10 pin 9: lol; pin 25: lor. 30 k w + 4 v 10, 24 4 v mhb799 fig.11 pin 10: vil; pin 24: vir. 4 v 80 w + 11, 23 mhb800 fig.12 pin 11: val; pin 23: var. 5.4 k w 4 v + + 13, 14 20, 21 12 k w mhb801 fig.13 pin 13: tc1l; pin 14: tc2l; pin 20: tc2r; pin 21: tc1r.
2000 dec 11 21 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h 4 v 28.5 k w 9.5 k w 4 v + 15, 19 mhb802 fig.14 pin 15: bcl; pin 19: bcr. 16, 18 + 80 w mhb803 fig.15 pin 16: outl; pin 18: outr. 27 3.4 k w 3.4 k w mhb804 fig.16 pin 27: v ref . 28 4.7 k w 300 w 5 k w + mhb805 fig.17 pin 28: v cap . 29 + mhb806 fig.18 pin 29: c av . 30 + mhb807 fig.19 pin 30: tw.
2000 dec 11 22 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h 31 6 k w + mhb808 fig.20 pin 31: c w . 35 32 16 k w + + mhb809 fig.21 pin 32: bpu; pin 35: fdi. 33 + mhb810 fig.22 pin 33: fdo. 38 1.8 k w mhb811 fig.23 pin 38: sda. 39 1.8 k w + mhb812 fig.24 pin 39: mad (i 2 c-bus address switch). 40 1.8 k w 5 v mhb813 fig.25 pin 40: scl.
2000 dec 11 23 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h 41 + mhb814 fig.26 pin 41: v cc . 42 10 k w 10 k w + 4 v mhb815 fig.27 pin 42: c ph . 43 3 k w + mhb816 fig.28 pin 43: cer.
2000 dec 11 24 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h package outline unit a 1 a 2 a 3 b p ce (1) eh e ll p z y w v q references outline version european projection issue date iec jedec eiaj mm 0.25 0.05 2.3 2.1 0.25 0.50 0.35 0.25 0.14 14.1 13.9 1 19.2 18.2 2.4 1.8 7 0 o o 0.15 2.35 0.1 0.3 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 2.0 1.2 sot205-1 97-08-01 99-12-27 d (1) (1) (1) 14.1 13.9 h d 19.2 18.2 e z 2.4 1.8 d b p e q e a 1 a l p detail x l (a ) 3 b 11 y c d h b p e h a 2 v m b d z d a z e e v m a x 1 44 34 33 23 22 12 133e01 pin 1 index w m w m 0 5 10 mm scale qfp44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm sot205-1 a max. 2.60
2000 dec 11 25 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 220 c for thick/large packages, and below 235 c for small/thin packages. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2000 dec 11 26 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package soldering method wave reflow (1) bga, lfbga, sqfp, tfbga not suitable suitable hbcc, hlqfp, hsqfp, hsop, htqfp, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable
2000 dec 11 27 philips semiconductors product speci?cation i 2 c-bus controlled economic btsc stereo decoder and audio processor TDA9853h data sheet status note 1. please consult the most recently issued data sheet before initiating or completing a design. data sheet status product status definitions (1) objective speci?cation development this data sheet contains the design target or goal speci?cations for product development. speci?cation may change in any manner without notice. preliminary speci?cation quali?cation this data sheet contains preliminary data, and supplementary data will be published at a later date. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. product speci?cation production this data sheet contains ?nal speci?cations. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. purchase of philips i 2 c components purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011.
? philips electronics n.v. sca all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. internet: http://www.semiconductors.philips.com 2000 70 philips semiconductors C a worldwide company for all other countries apply to: philips semiconductors, marketing communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 3 figtree drive, homebush, nsw 2140, tel. +61 2 9704 8141, fax. +61 2 9704 8139 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, via casati, 23 - 20052 monza (mi), tel. +39 039 203 6838, fax +39 039 203 6800 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5057 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland : al.jerozolimskie 195 b, 02-222 warsaw, tel. +48 22 5710 000, fax. +48 22 5710 001 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 58088 newville 2114, tel. +27 11 471 5401, fax. +27 11 471 5398 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 5f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2451, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 60/14 moo 11, bangna trad road km. 3, bagna, bangkok 10260, tel. +66 2 361 7910, fax. +66 2 398 3447 turkey: yukari dudullu, org. san. blg., 2.cad. nr. 28 81260 umraniye, istanbul, tel. +90 216 522 1500, fax. +90 216 522 1813 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 208 730 5000, fax. +44 208 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 3341 299, fax.+381 11 3342 553 printed in the netherlands 753504/01/pp 28 date of release: 2000 dec 11 document order number: 9397 750 07474

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